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Assim Sagahyroon, Associate Professor
PhD, University of Arizona, USA, 1989

Assim

Address:
Department of Computer Engineering
College of Engineering American University of Sharjah
P.O. Box 26666
Sharjah, United Arab Emirates

Room: EL 104
Office: +(971) 6 515 2952
Fax: +(971) 6 515 2979
E-mail: asagahyroon@aus.edu

Research Interests

VLSI testing, power consumption in CMOS VLSI circuits, hardware description languages, computer architecture and FPGA-based systems

Course
Description
COE 221
Digital Systems
COE 425
Modern Computer Organization
COE 428
VLSI Design
COE 490
Design Project I
ELE 241
Electronics I
COE 221
Digital Systems

Biography

Dr. Sagahyroon joined the Department of Computer Engineering during the fall of 2003. From 1993 to 1999, he was a faculty member with the Computer Science and Engineering Department at Northern Arizona University where he became a tenured associate professor. In the fall of 1999, he joined the California State University system, and earned his tenure in the summer of 2002. He also worked in industry for IBM, Lucent, Zhone Technology and as a consultant for V-Cube Corporation. His research interests are in the general areas of VLSI testing and power consumption in VLSI circuits. He served as a reviewer for the National Science Foundation, International Journal of VLSI Design and IEEE Transactions on Education.

Publications

  1. 1. S. Da’na, A. Sagahyroon,  A. Alali, A. Elrayes and R. Alayadi  “Development of a  Monitoring and Control Platform for PLC-Based Applications” to appear in the Elsevier Journal of  Computer Standards & Interfaces

    2. A. Sagahyroon and F. Aloul, “Using SAT-Based Techniques in Power Estimation” Elsevier Microelectronics Journal; vol. 38, no. 6-7; 2007

    3. A. Sagahyroon, A. Al-Ali, F. Sajwani, A. Mehery and I. Shahin “Assessing the Feasibility of Using RFID Technology in Airports”, Proceedings of  the RFID Eurasia 2007 Conference, Istanbul, Sept. 2007

    4. H. Sayed, S. Al Ahdab and A. Sagahyroon  “Interconnect Challenges in the Nanometer Technology”,  Proceedings of the First Sharjah International Conference on

    Nanotechnology and Its applications, April 2007

    5. A. Sagahyroon, “Power Consumption in handheld computers”, Proc. of the 2006 IEEE Asia-Pacific Conference on Circuits and Systems, Singapore, Dec. 2006

    6. M. Aljunaid, I. A/Maaly and A. Sagahyroon, “Using Ann to Predict the Best Hub Location”, Proceedings of the 2006 IEEE Asia-Pacific Conference on Circuits and Systems, Singapore, Dec. 2006

    7. J. Placer and A. Sagahyroon, “Design and Implementation of a VSL System." International Journal of Intelligent Automation & Soft Computing vol. 12, no. x, 2006.

    8. A. Sagahyroon and A. Mohamed, “Resizable Translation Storage Buffers,” Journal of Circuits, Systems and Computers, vol. 15, no. 2, April 2006.

    9. A. Sagahyroon and Maddu Karunaratne, “Cell Library Creation Using ALF,” Journal of Computing and Information Technology, vol. 13, no. 5, 2005.

    10. A. Sagahyroon and F. Aloul, “Maximum Power-up Current Estimation in Combinational CMOS Circuits,” Proceedings of the 13th IEEE Mediterranean Electro-Technical Conference, May 2006, Malaga, Spain.

    11.F. Aloul and A. Sagahyroon, “Using ILP Techniques to Excite Stuck-Open Faults in CMOS Combinational Circuits,” Proceedings of the 4th ACS/IEEE International Conference on Computer Systems & Applications, Sharjah, April 2006.

    12.F. Aloul and A. Sagahyroon, “Estimation of the Weighted Maximum Switching Activity in Combinational CMOS Circuits,” Proceedings of the 2006 IEEE International Symposium on Circuits and Systems, May 2006, Kos, Greece.

    13.A. Sagahyroon, Geetha Lakkaraju and M. Karunaratne, “A Functional Verification Environment,” Proceedings ofthe 48th IEEE Midwest Symposium on Circuits & Systems, August 2005, Ohio, USA.

    14.M. Karunaratne, C. Ranasinghe and A. Sagahyroon, ”Dynamic Switching Activity Generation Technique for Power Analysis of Electronic Circits” Proceedings of the 48th IEEE Midwest Symposium on Circuits & Systems, August 2005, Ohio, USA.

    15. M. Karunaratne, A. Sagahyroon and S. Podhutri, “RTL Fault Modeling,” Proceedings of the 48th IEEE midwest Symposium on Circuits & Systems, August 2005, Ohio, USA. 16. A. Sagahyroon, and T. Alkhudairi, “FPGA-Based Data Acquisition of Sensor Data,” Proceedings of the IEEE International Conference in Industrial Technology, Tunisia, December 2004.

    17. A. Sagahyroon, M.A. Aljarah, A. Alali and M. Hadi, “Design and Implementation of a Low Cost UAV Controller," Proceedings of the IEEE International Conference in Industrial Technology, Tunisia, December 2004.

    18. A. Sagahyroon and M. Karunaratne, “Impact of Cache Optimization Techniques on Energy Management," Proceedings of the 2004 IEEE Canadian Conference in Electrical and Computer Engineering, Ontario, Canada.

    19. A. Sagahyroon, “On the Use of HDLs in Modeling Communication Protocols,” Proceedings of the International Conference on Computing, Communication and Control, Austin, Texas, 2004.

    20 .M. Karunaratne, A. Sagahyroon and A. Weerakkody, “An Advanced Library Format for ASIC Design,” Proceedings of the 2004 IEEE Canadian Conference in Electrical & Computer Engineering, Ontario, Canada, May 2004.
    21."Spread ALOHA as a Multiple Access Technique for Satellite Personal Communications & The Capture Effect," Proceedings of the 10th International Conference on Telecommunication Systems, Modeling & Analysis, Monterey, California, October 2002 (with H. Mageed).

    22."A Scheme for Implementing Address Translation Storage Buffers," Proceedings of the IEEE Canadian Conference in Electrical and Computer Engineering, Manitoba, Canada, May 2002 (with A. Mohamed).

    23."Maximizing Heat Dissipation for Burn-In Testing," Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, May 2002, Manitoba, Canada.

    24."From AHPL to VHDL: A Course in Hardware Description Languages," IEEE Transactions on Education, Vol. 43, No. 4, November 2000.
    25."A VHDL-Based Simulation Methodology for Estimating Switching Activity in CMOS Static Circuits," Proceedings of the 11th Annual IEEE ASIC Conference, Rochester, New York, September 1998 (with J. Placer, M. Burmood).

    26."Design of a Fuzzy Variable Speed Limit System for Rural Highways," Proceedings of the International Conference on Rural Advanced Technology Transportation Systems, Pennsylvania State University, College Park, PA, September 1998 (with J. Placer). 27."Group Contexts: An Architectural Approach to Virtual Sharing," Proceedings of the 1997 IEEE Pacific Rim Conference, Victoria, Canada, 1997 (with A. Mohamed).

    28."An Object Oriented Logic Simulator for Teaching and Research," Journal of Computer Applications in Engineering Education, vol. 5, no. 2, John Wiley & Sons Pub., 1997 (with J. Placer).

    29."On the Use of Hardware Description Languages in Teaching VLSI Design Courses," Proceedings of the IEEE/ASEE 1996 Frontiers in Education Conference, Salt Lake City, Utah, 1996 (with M. Massoumi).

    30."A Framework for Estimating Maximum Power Dissipation in CMOS Combinational Circuits Using Genetic Algorithms," Proceedings of the IEEE 28th Southeastern Symposium on Systems Theory, Baton Rouge, Louisiana, 1996 (with J. Placer and M. Massoumi).

    31."Computer Education in the Developing Countries," World Conference on Computers in Education VI, Chapter 17, Birmingham, United Kingdom, Chapman & Hall Publishers, 1995.

    32."A Parallel Algorithm for VLSI Test Generation," Proceedings of the IASTED/ISMM International Conference on Parallel Processing and Distributed Computing and Systems, Georgetown University, Washington D.C., 1995 (with M. Medidi).

    33."Using Computer-Aided-Instruction to Teach Microprocessors," Proceedings of the American Society for Engineering Education Annual Conference, Anaheim, California, 1995 (with A. Pralle).

    34."On Obtaining Parameters for a Model of Speech Production," Proceedings of the Fifth International Conference on Signal Processing Applications and Technology, Dallas, Texas, 1994 (with I. Maaly and A. Obeid).

    35."In Pursuit of the Optimal Digital Design Laboratory," Proceeding of the American Society for Engineering Education Annual Conference, Alberta, Canada, 1994 (with R. Feugate).

    36."The Pathologist: An Expert System for the Diagnosis of Lymph Node Enlargements," Proceedings of the IASTED Conference, Alexandria, Egypt, 1992 (with E. Elhag, M.D.).

    37."An Intelligence Driven Test System for the Detection of Stuck-Open Faults in CMOS Sequential Circuits," Proceedings of the Colorado Microelectronics Conference, Colorado Springs, 1989 (with M.D. Karu and F. Hill).

    38."An RTL Level Backward State Justification Search," Proceedings of the Colorado Microelectronics Conference, Colorado Springs, 1989 (with M.D. Karu and F. Hill).

 
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